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Bhattacharyya

Silicon Based Unified Memory Devices and Technology

Medium: Buch
ISBN: 978-1-138-03271-2
Verlag: Taylor & Francis Ltd
Erscheinungstermin: 28.06.2017
Lieferfrist: bis zu 10 Tage
The primary focus of this book is on basic device concepts, memory cell design, and process technology integration. The first part provides in-depth coverage of conventional nonvolatile memory devices, stack structures from device physics, historical perspectives, and identifies limitations of conventional devices. The second part reviews advances made in reducing and/or eliminating existing limitations of NVM device parameters from the standpoint of device scalability, application extendibility, and reliability. The final part proposes multiple options of silicon based unified (nonvolatile) memory cell concepts and stack designs (SUMs). The book provides Industrial R&D personnel with the knowledge to drive the future memory technology with the established silicon FET-based establishments of their own. It explores application potentials of memory in areas such as robotics, avionics, health-industry, space vehicles, space sciences, bio-imaging, genetics etc.

Produkteigenschaften


  • Artikelnummer: 9781138032712
  • Medium: Buch
  • ISBN: 978-1-138-03271-2
  • Verlag: Taylor & Francis Ltd
  • Erscheinungstermin: 28.06.2017
  • Sprache(n): Englisch
  • Auflage: 1. Auflage 2017
  • Produktform: Gebunden
  • Gewicht: 1315 g
  • Seiten: 544
  • Format (B x H x T): 254 x 180 x 53 mm
  • Ausgabetyp: Kein, Unbekannt

Autoren/Hrsg.

Autoren

Bhattacharyya, Arup

PART I CONVENTIONAL SILICON BASED NVM DEVICES. SILICON BASED DIGITAL MEMORIES AND NVMs: AN INTRODUCTORY OVERVIEW. HISTORICAL PROGRESSION OF NVM DEVICES. GENERAL PROPERTIES OF DIELECTRICS AND INTERFACE FOR NVM DEVICES. ELECTRIC FILMS FOR NVM DEVICES. NVM UNIQUE DEVICE PROPERTIES. NVM DEVICE STACK DESIGN. NVM CELLS, ARRAYS AND DISTURBS. NVM PROCESS TECHNOLOGY AND INTEGRATION SCHEME. NVM DEVICE RELIABILITY. CONVENTIONAL NVM CHALLENGES. PART II ADVANCED NVM DEVICES AND TECHNOLOGY. VOLTAGE SCALABILITY. HIGH-K DIELECTRICS FILMS FOR NVM. BAND ENGINEERING FOR NVM DEVICES. ENHANCED TECHNOLOGY INTEGRATION FOR NVM. PLANAR MULTILEVEL STORAGE NVM DEVICES. NON PLANAR AND 3D DEVICES AND ARRAYS. EMERGING NVMs & LIMITATIONS OF CURRENT NVM DEVICES. ADVANCED SILICON-BASED NVM DEVICE CONCEPTS. PART III: SUM: SILICON BASED UNIFIED MEMORY. SUM PERSPECTIVE, DEVICE CONCEPTS AND POTENTIALS. SUM TECHNOLOGY. BAND ENGINEERING FOR SUM DEVICES. UNIFUNCTIONAL SUM: THE USUM CELLS AND ARRAY. MULTIFUNCTIONAL SUM: THE MSUM CELLS AND ARRAYS. SUM FUNCTIONAL INTEGRATION, PACKAGING AND POTENTIAL APPLICATION.